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Computer data processing
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#	Item
471	Dynamic Compilation of Data-Parallel Kernels for Vector Processors Andrew Kerr1 , Gregory Diamos2 , S. Yalamanchili3 School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta, GA Add to Reading List Source URL: www.gdiamos.net Language: English - Date: 2012-03-06 12:51:51 Parallel computing Central processing unit GPGPU Nvidia Thread Vectorization Parallel Thread Execution CUDA SIMD Computing Concurrent computing Computer architecture
472	Microsoft Word - Final_Interact11.doc Add to Reading List Source URL: www.eembc.org Language: English - Date: 2013-04-08 17:03:50 Automatic parallelization Multi-core processor Speedup Thread Lock Task parallelism Central processing unit Data parallelism OpenMP Parallel computing Computing Computer programming
473	Appears in the Proceedings of the 21st International Symposium on High Performance Computer Architecture (HPCA), 2015 Scaling Distributed Cache Hierarchies through Computation and Data Co-Scheduling Nathan Beckmann, Po- Add to Reading List Source URL: people.csail.mit.edu Language: English - Date: 2015-01-08 12:13:44 Central processing unit Computer architecture Microprocessors CPU cache Cache Microarchitecture Parallel computing Dynamic random-access memory CAS latency Computer hardware Computer memory Computing
474	The ioSafe Data Recovery Service (DRS Basic) provides a no questions asked data recovery service. For any loss, no matter the reason. Whether you’re a victim of a drive failure or your child throws your drive in the fa Add to Reading List Source URL: iosafe.com Language: English - Date: 2015-04-08 12:37:42 Computer data Data management Transaction processing Data recovery Hard disk drive Backup Terabyte RAID IoSafe Information Data Computer hardware
475	TIMING AND OPTlMIZATlON 8 Optimization is a programming technique which provides access to data and instructions with a minimum of nonproductive searching time. When a program is optimized for the LGP-21, the programmer Add to Reading List Source URL: www.ed-thelen.org Language: English - Date: 2008-07-23 04:19:35 Central processing unit Instruction set Instruction set architectures Instruction cycle Optimum programming Missile guidance LGP-30 D-37C Computer architecture Computing Computer hardware
476	Improving Meeting Summarization by Focusing on User Needs: A Task-Oriented Evaluation Pei-Yun Hsueh School of Informatics University of Edinburgh Add to Reading List Source URL: homepages.inf.ed.ac.uk Language: English - Date: 2009-08-21 08:52:14 Natural language processing Automatic summarization Data mining Linguistics Human–computer interaction User interface techniques Usability Speech recognition Decision support system Computational linguistics Science Information science
477	Exact JPEG recompression Andrew B. Lewis, Markus G. Kuhn Computer Laboratory Security Group Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2013-09-24 13:58:53 Digital signal processing Electronics Computer file formats Information JPEG Discrete cosine transform Quantization Lossless data compression Image compression Computing Data compression Graphics file formats
478	From Protocol Stack to Protocol Heap – Role-Based Architecture Robert Braden and Ted Faber USC Information Sciences Institute 4676 Admiralty Way Marina del Rey, CA Add to Reading List Source URL: www.isi.edu Language: English - Date: 2002-09-04 11:54:10 OSI protocols Computer networking Internet Protocol Internet protocols Communications protocol Packet Processing OSI model Link layer Packet switching Computing Network architecture Data
479	exercise 6: further examination of differences between spring Arctic and spring Antarctic ozone distributions 1 exploring stratospheric ozone using TOMS ozone data—computer lab exercises Add to Reading List Source URL: www.ccpo.odu.edu Language: English - Date: 1999-03-15 12:47:06 Environment Statistics Atmosphere Ozone layer Image processing Ozone Histogram Dobson unit Ozone depletion Chemistry Oxygen
480	The Cache Performance of Blocked Monica S. Lam, Add to Reading List Source URL: suif.stanford.edu Language: English - Date: 2003-10-16 22:29:20 Computer hardware Compiler optimizations CPU cache Central processing unit Data Memory hierarchy Cache-oblivious algorithm Loop tiling Cache Computer memory Computing

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